Company Profile
High Power Pulse Instruments GmbH (HPPI) is a supplier of ESD measurement equipment based on advanced Transmission Line Pulse (TLP) techniques.
Our products enable the characterization of semiconductor devices and circuits in the pulsed high current and high voltage time domain.
The development of our systems has profited largely from the knowledge gained over 20 years in the development of semiconductor devices, integrated high speed and radio frequency circuits and ESD protection solutions for the semiconductor industry.
Our products combine standard TLP, very fast TLP and Human Metal Model (HMM), Human Body Model (HBM) and Charged-Coupled TLP (CC-TLP) in a single test system to cover most of today’s ESD and device characterization needs.
Articles mentioning HPPI:
M. Drallmeier, Y. Zhou, and E. Rosenbaum, “On-Chip Single-Shot Pulse Generator for TDDB Characterization on a Sub-Nanosecond Timescale,” in Proc. IEEE Int. Rel. Phys. Symp., 2024, pp. 8C.4-1–8C.4-10.
S. Huang, S. Parthasarathy, Y. Zhou, J.-J. Hajjar, and E. Rosenbaum, “On-Chip ESD Protection for Multi-Gbps Automotive Serial IO in a 16-nm FinFET Process,” in ESD/EOS Symp., 2024.
S. Huang, S. Parthasarathy, Y. Zhou, J.-J. Hajjar, and E. Rosenbaum, “Reduced RC Time Constant High Voltage Tolerant Supply Clamp for ESD Protection in 16nm FinFET Technology,” in IRPS, 2024.
Y. Zhou and E. Rosenbaum, “Accuracy preserving extensions to a PDK MOSFET model for ESD simulation,” in Proc. EOS/ESD Symp., 2024.
M. Drallmeier and E. Rosenbaum, “Distributed protection for high-speed wireline receivers,” in Proc. 45th EOS/ESD Symp., 2023.
S. Huang, S. Parthasarathy, Y. Zhou, J.-J. Hajjar, and E. Rosenbaum, “Optimization of SCR for High-Speed Digital and RF Applications in 45-nm SOI CMOS Technology,” in Proc. IRPS, 2023.
S. Huang, S. Parthasarathy, Y. Zhou, J.-J. Hajjar, and E. Rosenbaum, “Poly Bounded Silicon Controlled Rectifier for ESD Protection in FinFET Technology,” in IEDM, 2023.
S. Huang and E. Rosenbaum, “Physics-based Compact Model of N-Well ESD Diodes,” in ESD/EOS Symp., 2023.
Y. Zhou, D. LaFonteese, and E. Rosenbaum, “Collector engineering of ESD PNP in BCD technologies,” in Proc. IEEE Int. Reliability Physics Symp. (IRPS), 2023.
S. Huang, S. Parthasarathy, Y. Zhou, J.-J. Hajjar, and E. Rosenbaum, “A high voltage tolerant supply clamp for ESD protection in 45-nm SOI technology,” in Proc. IRPS, 2022.
S. Huang and E. Rosenbaum, “Compact model of ESD diode suitable for sub-nanosecond switching transients,” in Proc. IRPS, 2021.
M. Shah, Y. Zhou, D. LaFonteese, and E. Rosenbaum, “Considerations in high voltage lateral ESD PNP design,” in Proc. IRPS, 2021.
A. Ayling, S. Huang, and E. Rosenbaum, “Sub-nanosecond reverse recovery measurement for ESD devices,” in Proc. IRPS, 2020.
G. Notermans, “How to Correctly Perform System Level ESD Testing of High-Speed Interface Boards,” May 2018, Feature article in In Compliance Magazine.
M. Keel and E. Rosenbaum, “ESD Self-Protection of High-Speed Transceivers Using Adaptive Active Bias Conditioning,” IEEE Transactions on Device and Materials Reliability, vol. 17, no. 1, pp. 113–120, Mar. 2017. DOI:10.1109/TDMR.2016.2628839.
J. Kuzmik et al., “Current conduction mechanism and electrical break-down in InN grown on GaN,” Applied Physics Letters, vol. 110, no. 23, p. 232103, 2017.DOI: 10.1063/1.4985128.
N. A. Thomson, Y. Xiu, and E. Rosenbaum, “Soft-Failures Induced by System-Level ESD,” IEEE Transactions on Device and Materials Reliability, vol. 17, no. 1, pp. 90–98, Mar. 2017. DOI: 10.1109/TDMR.2017.2667712.
M. Keel and E. Rosenbaum, “CDM-Reliable T-Coil Techniques for a 25-Gb/s Wireline Receiver Front-End,” IEEE Transactions on Device and Materials Reliability, vol. 16, no. 4, pp. 513–520, Dec. 2016. DOI:10.1109/TDMR.2016.2594281.
K. Meng, Z. Chen, and E. Rosenbaum, “Compact distributed multi-finger MOSFET model for circuit-level ESD simulation,” Microelectronics Reliability, vol. 63, pp. 11–21, Aug. 1, 2016.DOI:10.1016/j.microrel.2015.12.010.
R. Mertens and E. Rosenbaum, “Physical Basis for CMOS SCR Compact Models,” IEEE Transactions on Electron Devices, vol. 63, no. 1, pp. 296–302, Jan. 2016. DOI:10.1109/TED.2015.2502951.
S. Selmo et al., “Low power phase change memory switching of ultra-thin In3Sb1Te2 nanowires,” Applied Physics Letters, vol. 109, no. 21, p. 213103, 2016.DOI:10.1063/1.4968510.
Z. Chen, R. Mertens, C. Reiman, and E. Rosenbaum, “Improved GGSCR layout for overshoot reduction,” in 2015 IEEE International Reliability Physics Symposium, Apr. 2015, 3F.2.1–3F.2.8. DOI: 10.1109/IRPS.2015.7112720.
K. Meng, R. Mertens, and E. Rosenbaum, “Piecewise-Linear Model With Transient Relaxation for Circuit-Level ESD Simulation,” IEEE Transactions on Device and Materials Reliability, vol. 15, no. 3, pp. 464–466, Sep. 2015. DOI:10.1109/TDMR.2015.2466436.
R. Mertens, N. Thomson, Y. Xiu, and E. Rosenbaum, “Analysis of Active-Clamp Response to Power-On ESD: Power Supply Integrity and Performance Tradeoffs,” IEEE Transactions on Device and Materials Reliability, vol. 15, no. 3, pp. 263–271, Sep. 2015. DOI: 10.1109/TDMR.2015.2464222.
C. Reiman, N. Thomson, Y. Xiu, R. Mertens, and E. Rosenbaum, “Practical methodology for the extraction of SEED models,” in 2015 37th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), Sep. 2015.DOI: 10.1109/EOSESD.2015.7314789.
R. Mertens, N. Thomson, Y. Xiu, and E. Rosenbaum, “Theory of active clamp response to power-on ESD and implications for power supply integrity,” in Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2014, Sep. 2014.
N. Thomson, Y. Xiu, R. Mertens, M. Keel, and E. Rosenbaum, “Custom test chip for system-level ESD investigations,” in Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2014, Sep. 2014.
Yang Xiu, N. Thomson, R. Mertens, and E. Rosenbaum, “A mechanism for logic upset induced by power-on ESD,” in Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2014, Sep. 2014.
N. Jack and E. Rosenbaum, “Comparison of FICDM and Wafer-Level CDM Test Methods,” IEEE Transactions on Device and Materials Reliability, vol. 13, no. 2, pp. 379–387, Jun. 2013. DOI:10.1109/TDMR.2013.2262606.
K. Meng and E. Rosenbaum, “Layout-aware, distributed, compact model for multi-finger MOSFETs operating under ESD conditions,” in 2013 35th Electrical Overstress/Electrostatic Discharge Symposium, Sep. 2013, pp. 97–104.
R. Mertens and E. Rosenbaum, “A physics-based compact model for SCR devices used in ESD protection circuits,” in 2013 IEEE International Reliability Physics Symposium (IRPS), Apr. 2013, 2B.2.1–2B.2.7. DOI:10.1109/IRPS.2013.6531947.
R. Mertens and E. Rosenbaum, “Separating SCR and trigger circuit related overshoot in SCR-based ESD protection circuits,” in 2013 35th Electrical Overstress/Electrostatic Discharge Symposium, Sep. 2013, pp. 125–132.
N. Jack and E. Rosenbaum, “Comparing FICDM and wafer-level CDM test methods: Apples to Oranges?” In Electrical Overstress / Electrostatic Discharge Symposium Proceedings 2012, Sep. 2012, pp. 231–239.
W. Simbürger, D. Johnsson, and M. Stecher, “High Current TLP Characterisation: An Effective Tool for the Development of Semiconductor Devices and ESD Protection Solutions,” in ARMMS RF & Microwave Society, Nov. 2012.